| CPC H10H 20/857 (2025.01) [H01L 21/4846 (2013.01); H01L 23/49838 (2013.01); H01L 23/49866 (2013.01); H01L 25/0753 (2013.01); H01L 24/16 (2013.01); H01L 2224/16237 (2013.01); H01L 2924/12041 (2013.01); H10H 20/0364 (2025.01)] | 26 Claims |

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1. An array substrate, comprising:
a base substrate;
a metal wiring layer provided at a side of the base substrate;
a first planarization layer provided at a side of the metal wiring layer away from the base substrate;
an electrode layer provided at a side of the first planarization layer away from the base substrate; the electrode layer comprising a metal sub-layer and a conductive sub-layer sequentially stacked at the side of the base substrate; material of the metal sub-layer comprising metal or metal alloy; the conductive sub-layer having oxidation resistance and covering the metal sub-layer;
a second planarization layer provided at a side of the electrode layer away from the base substrate;
a functional device layer provided at a side of the second planarization layer away from the base substrate, and comprising a plurality of functional devices electrically connected to the electrode layer;
wherein the array substrate further comprises an inorganic protective layer sandwiched between the electrode layer and the second planarization layer.
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