US 12,471,374 B2
Method of fabricating array substrate and array substrate thereof
Song Sun, Beihai (CN); Qin Xiong, Beihai (CN); Jinsong Lu, Beihai (CN); Je-Hao Hsu, Beihai (CN); and Haijiang Yuan, Beihai (CN)
Assigned to BEIHAI HUIKE PHOTOELECTRICS TECHNOLOGY CO., LTD., Beihai (CN); and HKC CORPORATION LIMITED, Shenzhen (CN)
Filed by BEIHAI HUIKE PHOTOELECTRICS TECHNOLOGY CO., LTD., Beihai (CN); and HKC CORPORATION LIMITED, Shenzhen (CN)
Filed on Oct. 25, 2022, as Appl. No. 17/973,476.
Claims priority of application No. 202111271191.1 (CN), filed on Oct. 29, 2021.
Prior Publication US 2023/0137855 A1, May 4, 2023
Int. Cl. H10D 86/60 (2025.01); H10D 30/67 (2025.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01); H10D 99/00 (2025.01)
CPC H10D 86/60 (2025.01) [H10D 30/6734 (2025.01); H10D 30/6755 (2025.01); H10D 86/0221 (2025.01); H10D 86/423 (2025.01); H10D 86/443 (2025.01); H10D 99/00 (2025.01)] 6 Claims
OG exemplary drawing
 
1. A method for fabricating an array substrate, wherein the array substrate comprising a bonding portion, the method for fabricating the array substrate comprises a method for fabricating the bonding portion, and wherein the method for fabricating the bonding portion comprises:
providing a substrate, and forming a metal layer on the substrate;
depositing a first insulating layer material and a second insulating layer material successively on the metal layer;
etching the first insulating layer material at a first etching rate to form a first insulating layer having a first via hole;
etching the second insulating layer material at a second etching rate to form a second insulating layer having a second via hole, so as to obtain a composite insulating layer of a double-layer structure;
forming on the composite insulating layer an electrode layer that is connected to the metal layer through the first via hole and the second via hole to form the bonding portion;
wherein the first etching rate and the second etching rate have different magnitudes, and wherein the first via hole and the second via hole are arranged correspondingly;
wherein the array substrate comprises a display region and a non-display region, and the bonding portion is disposed in the non-display region;
wherein the array substrate further comprises a first gate layer, a gate insulating layer, a semiconductor layer, a source and drain layer, and a first passivation layer that are successively formed on the substrate corresponding to the display region;
wherein the source and drain layer comprises a source layer and a drain layer;
wherein the metal layer is formed in a same layer as the source and drain layer, and the composite insulating layer is formed in a same layer as the first passivation layer;
wherein the operation of providing a substrate and forming a metal layer on the substrate comprises:
providing a substrate, and forming a first metal layer on the substrate that is disconnected from the first gate layer;
depositing a first gate insulating layer material and a second gate insulating layer material successively on the first metal layer;
etching the first gate insulating layer material at a third etching rate to form a first gate insulating layer having a third via hole;
etching the second gate insulating layer material at a fourth etching rate to form a second gate insulating layer having a fourth via hole, so as to obtain a composite gate insulating layer of a double-layer structure; and
depositing a second metal layer material on the composite gate insulating layer, and etching to form the metal layer connected with the source layer, and exposing the third via hole and the fourth via hole;
wherein the operation of forming on the composite insulating layer an electrode layer that is connected to the metal layer through the first via hole and the second via hole to form a bonding portion comprises:
forming on the composite gate insulating layer and the composite insulating layer an electrode layer that is connected to the metal layer through the first via hole and the second via hole and that is connected to the first metal layer through the third via hole and the fourth via hole, thus forming the bonding portion;
wherein the third etching rate and the fourth etching rate have different magnitudes, and wherein the third via hole and the fourth via hole are arranged correspondingly.