| CPC H10D 86/60 (2025.01) [H10D 86/443 (2025.01)] | 20 Claims |

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1. A display panel, comprising:
a substrate, wherein the substrate is provided with a display area and a non-display area surrounding the display area, and the non-display area is provided with a drive chip and a fan-out area arranged between the drive chip and the display area;
wherein the drive chip comprises a first side close to the display area, two second sides connected with the first side, and a third side arranged opposite to the first side; the drive chip comprises a plurality of input terminals and a plurality of output terminals, the plurality of input terminals are arranged along an extension direction of the third side, the plurality of output terminals comprise a plurality of first output terminals and a plurality of second output terminals; the plurality of first output terminals are arranged along an extension direction of the first side, the plurality of second output terminals are disposed on a side of the plurality of first output terminals away from the display area, and the plurality of second output terminals are disposed in an area between the plurality of first output terminals and the plurality of input terminals; projections of the plurality of second output terminals on the third side and projections of the plurality of input terminals on the third side do not overlap; and
wherein the fan-out area is provided with a plurality of fan-out traces, and the plurality of fan-out traces comprise a plurality of first fan-out traces and a plurality of second fan-out traces, each of the plurality of first fan-out traces is electrically connected with a corresponding first output terminal through the first side, each of the plurality of second fan-out traces is electrically connected with a corresponding second output terminal through an adjacent second side, and in a direction from close to the display area to away from the display area, the plurality of second fan-out traces are electrically connected with adjacent second output terminals in sequence.
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