| CPC H10D 62/121 (2025.01) [H10D 30/6735 (2025.01); H10D 30/6757 (2025.01)] | 20 Claims |
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1. A semiconductor device comprising:
a substrate extending a first direction and a second direction perpendicular to the first direction;
an active pattern extending in the first direction on the substrate, the active pattern protrudes from the substrate in a third direction perpendicular to the first direction and the second direction;
a first plurality of lower nanosheets stacked apart from each other in the third direction on the active pattern;
a second plurality of lower nanosheets stacked apart from each other in the third direction on the active pattern, the second plurality of lower nanosheets are spaced apart from the first plurality of lower nanosheets in the first direction;
a first plurality of upper nanosheets stacked apart from each other in the third direction on the first plurality of lower nanosheets, the first plurality of upper nanosheets are spaced apart from the first plurality of lower nanosheets in the third direction;
a second plurality of upper nanosheets stacked apart from each other in the third direction on the second plurality of lower nanosheets, the second plurality of upper nanosheets are spaced apart from the second plurality of lower nanosheets in the third direction;
a first upper gate electrode extending in the second direction on the active pattern, the first upper gate electrode surrounds the first plurality of upper nanosheets; and
a second upper gate electrode extending in the second direction on the active pattern, the second upper gate electrode is spaced apart from the first upper gate electrode in the first direction, the second upper gate electrode surrounds the second plurality of upper nanosheets,
wherein a width in the second direction of the first plurality of upper nanosheets is different from a width in the second direction of the second plurality of upper nanosheets.
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