US 12,471,324 B2
Power semiconductor device having an electrode with an embedded material
Stefan Karner, Klagenfurt (AT); Oliver Blank, Villach (AT); Günter Denifl, Annenheim (AT); Germano Galasso, Unterhaching (DE); Saurabh Roy, Villach (AT); Hans-Joachim Schulze, Taufkirchen (DE); and Michael Stadtmueller, Villach (AT)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies Austria AG, Villach (AT)
Filed on Jun. 30, 2023, as Appl. No. 18/345,678.
Application 18/345,678 is a continuation of application No. 17/353,119, filed on Jun. 21, 2021, granted, now 11,728,427.
Prior Publication US 2023/0343871 A1, Oct. 26, 2023
Int. Cl. H10D 30/69 (2025.01); H10D 30/66 (2025.01); H10D 64/00 (2025.01); H10D 64/27 (2025.01)
CPC H10D 30/794 (2025.01) [H10D 30/668 (2025.01); H10D 30/792 (2025.01); H10D 64/117 (2025.01); H10D 64/513 (2025.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate;
a trench formed in a first main surface of the semiconductor substrate;
a field plate electrode in the trench and reaching a same level as the first main surface of the semiconductor substrate;
an insulating material that separates the field plate electrode from the semiconductor substrate; and
a material embedded in the field plate electrode,
wherein the field plate electrode comprises a different material than the material embedded in the field plate electrode,
wherein the trench adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device,
wherein the field plate electrode has a void,
wherein the material embedded in the field plate electrode lines sidewalls and a bottom of the void,
wherein an inner region of the void spaced inward from the sidewalls and the bottom of the void is unfilled.