US 12,471,319 B2
Thin-film transistor substrate with impurity concentration profile in layering direction having peak outside semiconductor layer
Kazushige Takechi, Kanagawa (JP); Kenji Sera, Kanagawa (JP); Jun Tanaka, Kanagawa (JP); Shui He, Xiamen (CN); and FeiPeng Lin, Xiamen (CN)
Assigned to WUHAN TIANMA MICRO-ELECTRONICS CO., LTD., Wuhan (CN)
Filed by WUHAN TIANMA MICRO-ELECTRONICS CO., LTD., Wuhan (CN)
Filed on Mar. 21, 2022, as Appl. No. 17/699,587.
Claims priority of application No. 2021-047947 (JP), filed on Mar. 22, 2021.
Prior Publication US 2022/0302313 A1, Sep. 22, 2022
Int. Cl. H10D 30/67 (2025.01)
CPC H10D 30/6755 (2025.01) [H10D 30/6731 (2025.01); H10D 30/6745 (2025.01); H10D 30/6757 (2025.01)] 6 Claims
OG exemplary drawing
 
1. A thin-film transistor substrate comprising:
an insulating substrate; and
a conductor including a top-gate electrode part of an oxide semiconductor thin-film transistor;
an oxide semiconductor layer located lower than the top-gate electrode part and including a channel region of the oxide semiconductor thin-film transistor; and
an upper insulating layer located between the conductor layer and the oxide semiconductor layer,
wherein the oxide semiconductor layer includes low-resistive regions lower in resistance than the channel region,
wherein the low-resistive regions sandwich the channel region in an in-plane direction of the insulating substrate and contain impurities to cause resistance reduction of the low-resistive regions,
wherein a concentration profile in a layering direction of the impurities to cause resistance reduction of the low resistive regions has one or more peaks,
wherein the one or more peaks are located outside the oxide semiconductor layer, and
wherein a distance between a location having a peak closest to the oxide semiconductor layer among the one or more peaks and the center of the oxide semiconductor layer in the layering direction is not less than a thickness of the oxide semiconductor layer.