US 12,471,313 B2
Array substrate and display device including thereof
Deuk-Ho Yeon, Paju-si (KR); Kum-Mi Oh, Paju-si (KR); and Sun-Wook Ko, Paju-si (KR)
Assigned to LG Display Co., Ltd., Seoul (KR)
Filed by LG Display Co., Ltd., Seoul (KR)
Filed on Oct. 31, 2022, as Appl. No. 17/977,978.
Claims priority of application No. 10-2021-0155320 (KR), filed on Nov. 12, 2021.
Prior Publication US 2023/0155030 A1, May 18, 2023
Int. Cl. H10D 30/67 (2025.01); H10H 29/14 (2025.01); H10K 59/126 (2023.01); H10K 59/80 (2023.01)
CPC H10D 30/6723 (2025.01) [H10D 30/6731 (2025.01); H10D 30/6745 (2025.01); H10H 29/142 (2025.01); H10K 59/126 (2023.02); H10K 59/8794 (2023.02)] 23 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a substrate;
a shield metal disposed over the substrate;
a thin film transistor disposed over the shield metal;
a first passivation layer disposed on the thin film transistor:
a light emitting diode disposed on the first passivation layer and including a reflection pattern; and
a second passivation layer disposed on the light emitting diode,
wherein;
the thin film transistor includes an active layer over the shield metal, the thin film transistor further including a source electrode, a drain electrode and a gate electrode;
the active layer includes a channel region, a source region positioned at one side of the channel region and a drain region positioned at an opposite side of the channel region;
at least one of the shield metal, the channel region and the array substrate includes a thermal gradient portion that causes a temperature of a first area in the channel region to be different from a temperature of a second area in the channel region; and
a first electrode of the light emitting diode is electrically connected to the thin film transistor through a connection electrode passing through the first passivation layer and the second passivation layer.