US 12,471,303 B2
Semiconductor device having an injection suppression region
Tohru Shirakawa, Matsumoto (JP); Daisuke Ozaki, Okaya (JP); and Yasunori Agata, Matsumoto (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kanagawa (JP)
Filed by FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed on Dec. 27, 2021, as Appl. No. 17/646,136.
Application 17/646,136 is a continuation of application No. PCT/JP2020/044532, filed on Nov. 30, 2020.
Claims priority of application No. 2020-006095 (JP), filed on Jan. 17, 2020; and application No. 2020-085521 (JP), filed on May 14, 2020.
Prior Publication US 2022/0149191 A1, May 12, 2022
Int. Cl. H10D 12/00 (2025.01); H10D 8/00 (2025.01); H10D 12/01 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01)
CPC H10D 12/481 (2025.01) [H10D 8/422 (2025.01); H10D 12/038 (2025.01); H10D 62/127 (2025.01); H10D 62/142 (2025.01)] 15 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor substrate including a well region, a transistor portion, and a diode portion,
wherein the transistor portion includes an injection suppression region configured to suppress injection of a carrier of a second conductivity type at an end portion on the diode portion side in a top view of the semiconductor substrate, and the injection suppression region extends along a boundary between the transistor portion and the diode portion;
a plurality of trench portions configured to extend in an extending direction of the transistor portion and the diode portion to be arranged in an arrangement direction,
wherein both the transistor portion and the diode portion have a base region of a second conductivity type in a front surface of the semiconductor substrate,
wherein the transistor portion further includes an emitter region of a first conductivity type and an extraction region of a second conductivity type having a higher doping concentration than the base region in the front surface of the semiconductor substrate,
wherein the plurality of trench portions include gate trench portions and dummy trench portions,
wherein each of the gate trench portions includes gate trench straight portions such that the plurality of trench portions include gate trench straight portions,
wherein each of the dummy trench portions includes at least one dummy trench straight portion such that the plurality of trench portions include dummy trench straight portions, and
wherein a region including the injection suppression region and extending up to the well region in the extending direction in plan view is not provided with the emitter region and the extraction region from each dummy trench straight portion, located at least in part in the injection suppression region, to another nearest dummy trench straight portion, located at least in part in the injection suppression region, in the arrangement direction of the plurality of trench portions.