US 12,471,301 B2
Integrated circuit and bipolar transistor
Gerhard Prechtl, Rosegg (AT); Andreas Peter Meiser, Sauerlach (DE); and Thomas Ostermann, Koestenburg (AT)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Oct. 30, 2020, as Appl. No. 17/085,426.
Application 14/243,332 is a division of application No. 12/955,195, filed on Nov. 29, 2010, granted, now 8,735,289, issued on May 27, 2014.
Application 17/085,426 is a continuation of application No. 14/243,332, filed on Apr. 2, 2014, abandoned.
Prior Publication US 2021/0050434 A1, Feb. 18, 2021
Int. Cl. H10D 10/60 (2025.01); H10D 10/01 (2025.01); H10D 62/17 (2025.01); H10D 84/60 (2025.01)
CPC H10D 10/60 (2025.01) [H10D 10/061 (2025.01); H10D 62/184 (2025.01); H10D 84/645 (2025.01)] 13 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a semiconductor substrate, the semiconductor substrate having a first surface;
a first doping region in the semiconductor substrate;
a second doping region in the semiconductor substrate, the first doping region and the second doping region being laterally spaced apart from each other;
a first insulating layer on the first surface of the semiconductor substrate, the first insulating layer having a first opening arranged above the first doping region and a second opening arranged above the second doping region;
a polysilicon layer on the first insulating layer, the polysilicon layer being fully laterally planar, the polysilicon layer having a first opening and a second opening, the first opening of the polysilicon layer being arranged above the first opening of the first insulating layer and the second opening of the polysilicon layer being arranged above the second opening of the first insulating layer;
a second insulating layer on the polysilicon layer and having a first opening and a second opening, the first opening of the second insulating layer arranged above the first opening of the polysilicon layer, and the second opening of the second insulating layer arranged above the second opening of the polysilicon layer;
a first contact element disposed in the first opening of the first insulating layer, the first opening of the polysilicon layer and the first opening of the second insulating layer, the first contact element being in electrical contact with the first doping region and the polysilicon layer; and
a second contact element disposed in the second opening of the first insulating layer, the second opening of the polysilicon layer and the second opening of the second insulating layer, the second contact element being in electrical contact with the second doping region and the polysilicon layer, wherein the polysilicon layer electrically connects the first contact element with the second contact element.