US 12,471,268 B2
Semiconductor device and method of manufacturing the same
Jungoo Kang, Suwon-si (KR); and Jinsu Lee, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 5, 2022, as Appl. No. 17/960,578.
Claims priority of application No. 10-2022-0031650 (KR), filed on Mar. 14, 2022.
Prior Publication US 2023/0292489 A1, Sep. 14, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/315 (2023.02) [H10B 12/033 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a lower structure;
a lower electrode on the lower structure;
an upper electrode; and
a dielectric layer between the lower electrode and the upper electrode,
wherein the lower electrode comprises a bending reducing layer and a dielectric constant-increasing layer between the bending reducing layer and the dielectric layer,
an upper surface of the bending reducing layer and an upper surface of the dielectric constant-increasing layer are substantially co-planar,
the dielectric constant-increasing layer is configured to increase a dielectric constant of the dielectric layer, and
an elastic modulus of the bending reducing layer is greater than an elastic modulus of the dielectric constant-increasing layer.