| CPC H10B 12/315 (2023.02) [H10B 12/033 (2023.02)] | 20 Claims |

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1. A semiconductor device comprising:
a lower structure;
a lower electrode on the lower structure;
an upper electrode; and
a dielectric layer between the lower electrode and the upper electrode,
wherein the lower electrode comprises a bending reducing layer and a dielectric constant-increasing layer between the bending reducing layer and the dielectric layer,
an upper surface of the bending reducing layer and an upper surface of the dielectric constant-increasing layer are substantially co-planar,
the dielectric constant-increasing layer is configured to increase a dielectric constant of the dielectric layer, and
an elastic modulus of the bending reducing layer is greater than an elastic modulus of the dielectric constant-increasing layer.
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