| CPC H04W 64/006 (2013.01) [H04W 56/0035 (2013.01)] | 17 Claims |
|
1. An apparatus configured to mitigate frequency drift, the apparatus comprising processing circuitry and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the processing circuitry, cause the apparatus at least to:
model a base station clock with respect to a receiver clock so as to define the receiver clock at least partially based upon a frequency drift and a clock offset between the base station clock and the receiver clock in order to provide a floating frequency domain to compensate for the frequency drift between the base station clock and the receiver clock, wherein modeling the base station clock with respect to the receiver clock comprises generating a modeling filter for the base station clock and, in response to receiving an observation of clock information from the base station clock, updating the modeling filter based on the observation of clock information from the base station clock, and wherein the modeling filter is at least one of a non-Gaussian generalized variational inference (GVI)-based filter or an adaptive filter;
based on modeling the base station clock with respect to the receiver clock, generate at least one timing offset of the receiver clock with respect to the base station clock, wherein, in response to receiving the observation of clock information from the base station clock, generating the at least one timing offset comprises generating the at least one timing offset further based on the observation of clock information from the base station clock and also based on the modeling filter; and
determine a position of a user equipment (UE) associated with the receiver clock based at least partially upon the at least one timing offset.
|