| CPC H04L 27/2623 (2013.01) [H03F 1/3276 (2013.01); H03F 3/24 (2013.01); H04B 1/0475 (2013.01); H04W 74/04 (2013.01); H04W 76/15 (2018.02); H04B 2001/0425 (2013.01)] | 29 Claims |

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1. A first wireless communication device, comprising:
one or more memories that store processor-executable code; and
one or more processors configured to execute the processor-executable code and cause the first wireless communication device to:
receive, from a second wireless communication device, a capability message comprising a digital pre-distortion capability bit indicating that the second wireless communication device has a capability to compute digital pre-distortion information;
transmit a first message to the second wireless communication device in response to the capability message, wherein the first message requests the second wireless communication device to compute the digital pre-distortion information and transmit the digital pre-distortion information to the first wireless communication device; and
transmit a second message to the second wireless communication device in response to the capability message, wherein the second message comprises:
at least one clipping level associated with a crest factor reducer of a power amplifier circuit of the first wireless communication device,
a first kernel and first parameters associated with a digital pre-distorter of the power amplifier circuit, and
a second kernel and second parameters associated with a power amplifier of the power amplifier circuit.
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