US 12,470,228 B2
Signal receiving circuit and calibration method thereof
Yi-Chang Shih, Hsinchu (TW)
Assigned to REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed by REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed on Jan. 17, 2024, as Appl. No. 18/414,501.
Claims priority of application No. 112104244 (TW), filed on Feb. 7, 2023.
Prior Publication US 2024/0267054 A1, Aug. 8, 2024
Int. Cl. H03M 1/10 (2006.01)
CPC H03M 1/1019 (2013.01) [H03M 1/1023 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A signal receiving circuit configured to receive an input signal, the signal receiving circuit comprising:
a radio frequency (RF) front-end circuit configured to down-convert the input signal to generate a down-converted signal;
a filter circuit coupled to the RF front-end circuit and configured to filter the down-converted signal to generate a filtered signal;
an amplifier circuit coupled to the filter circuit and configured to amplify, according to a control signal, the filtered signal with a gain to generate an amplified signal;
an analog-to-digital converter (ADC) coupled to the amplifier circuit and configured to convert the amplified signal into a first digital code;
a compensation circuit coupled to the amplifier circuit and configured to generate a compensation code according to at least one of the control signal and the gain;
an adder circuit coupled to the compensation circuit and the ADC and configured to generate a second digital code according to the compensation code and the first digital code; and
a control circuit coupled to the amplifier circuit and the adder circuit and configured to generate the control signal according to the second digital code.