US 12,470,223 B2
Adaptive frequency scaling based on clock cycle time measurement
Eyal Fayneh, Givatayim (IL); Inbar Weintrob, Givat Ada (IL); Evelyn Landman, Haifa (IL); Faten Tanasra, Nazareth (IL); Guy Redler, Haifa (IL); and Shai Tzroia, Haifa (IL)
Assigned to PROTEANTECS LTD., Haifa (IL)
Appl. No. 18/285,719
Filed by PROTEANTECS LTD., Haifa (IL)
PCT Filed Apr. 7, 2022, PCT No. PCT/IL2022/050363
§ 371(c)(1), (2) Date Oct. 5, 2023,
PCT Pub. No. WO2022/215076, PCT Pub. Date Oct. 13, 2022.
Claims priority of provisional application 63/171,622, filed on Apr. 7, 2021.
Prior Publication US 2024/0372554 A1, Nov. 7, 2024
Int. Cl. H03L 7/093 (2006.01); G06F 1/04 (2006.01); G06F 1/08 (2006.01); G06F 1/28 (2006.01); G06F 1/30 (2006.01)
CPC H03L 7/093 (2013.01) [G06F 1/04 (2013.01); G06F 1/08 (2013.01); G06F 1/28 (2013.01); G06F 1/305 (2013.01); H03L 2207/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A controller for generation of a clock signal in a semiconductor integrated circuit (IC), the controller comprising:
a Noise Modulation Agent (NMA) configured to measure the clock signal and output a parameter indicative of an effective cycle time of the clock signal; and
an Adaptive Frequency Scaling (AFS) circuit configured to adjust a frequency of the clock signal based on the output of the NMA indicating a change in a power supply voltage of the semiconductor IC, wherein the AFS circuit is further configured to activate the adjustment of the frequency of the clock signal if the output of the NMA descends below a first threshold.