US 12,470,210 B2
Duty cycle correction method and duty cycle correction apparatus
Wei-Yi Cheng, Tainan (TW); and Su-Chueh Lo, Hsinchu (TW)
Assigned to MACRONIX International Co., Ltd., Hsinchu (TW)
Filed by MACRONIX International Co., Ltd., Hsinchu (TW)
Filed on Sep. 27, 2023, as Appl. No. 18/475,239.
Prior Publication US 2025/0105833 A1, Mar. 27, 2025
Int. Cl. H03K 7/08 (2006.01); H03K 5/02 (2006.01); H03K 5/24 (2006.01)
CPC H03K 7/08 (2013.01) [H03K 5/023 (2013.01); H03K 5/249 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A duty cycle correction apparatus, comprising:
a duty cycle adjuster, adjusting a duty cycle of a clock signal generated by a clock signal generator, and inputting the adjusted clock signal to a plurality of data pads of a storage device to generate a plurality of data signals, wherein the data pads are divided into at least two groups, and defined by data patterns that are inverse to each other;
a detection circuit, comprising a plurality of detectors respectively coupled to the data pads, detecting direct current voltages of the data signals generated by a first group of the data pads to generate a first average direct current voltage, and detecting direct current voltages of the data signals generated by a second group of the data pads to generate a second average direct current voltage;
a comparator, coupled to the detection circuit, comparing the first average direct current voltage and the second average direct current voltage and outputting a comparison result; and
a control logic, coupled to the comparator and controlling the duty cycle adjuster to adjust the duty cycle of the clock signal according to the comparison result.