US 12,470,176 B2
Doherty amplifier
Zhi Geng, Nijmegen (NL); and Yi Zhu, Nijmegen (NL)
Assigned to Ampleon Netherlands B.V., Nijmegen (NL)
Filed by Ampleon Netherlands B.V., Nijmegen (NL)
Filed on Feb. 28, 2023, as Appl. No. 18/176,218.
Claims priority of application No. 2031122 (NL), filed on Mar. 1, 2022.
Prior Publication US 2023/0283239 A1, Sep. 7, 2023
Int. Cl. H03F 1/02 (2006.01); H03F 1/56 (2006.01); H03F 3/21 (2006.01)
CPC H03F 1/0288 (2013.01) [H03F 1/56 (2013.01); H03F 3/211 (2013.01); H03F 2200/222 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A Doherty amplifier, comprising:
a packaged main amplifier comprising:
a main input lead for receiving a main RF signal;
a main power transistor configured for amplifying the main RF signal; and
a main output lead configured for outputting the main RF signal amplified by the main power transistor;
a packaged peak amplifier comprising:
a peak input lead assembly for receiving a peak RF signal;
a first peak power transistor configured for amplifying a part of the peak RF signal;
a second peak power transistor configured for amplifying a remaining part of the peak RF signal; and
a peak output lead for combining the part of the peak RF signal amplified by the first peak power transistor and the remaining part of the peak RF signal amplified by the second peak power transistor into an amplified peak RF signal; and
a Doherty combiner configured for:
combining the amplified main RF signal and the amplified peak RF signal into an RF output signal; and
outputting the RF output signal,
wherein the peak output lead comprises:
an inner edge facing the first and second peak power transistors;
an outer edge arranged opposite to the inner edge; and
a slot extending from the inner edge towards the outer edge and having a length corresponding to A times a wavelength at an operational frequency of the Doherty amplifier, wherein A lies in a range from 0.1 to 0.4,
wherein the slot divides the peak output lead in a first part, a second part, and a common part,
wherein the first part is electrically connected to the first peak power transistor,
wherein the second part is electrically connected to the second peak power transistor,
wherein the common part is:
arranged between the outer edge and the first and second parts; and
integrally connected to the first and second parts, and
wherein the slot ensures that the part of the peak RF signal amplified by the first peak power transistor combines with the part of the peak RF signal amplified by the second peak power transistor in the common part.