US 12,470,148 B2
Trans-inductor voltage regulator for high bandwidth power delivery
Shuai Jiang, San Jose, CA (US); Xin Li, Cupertino, CA (US); Woon-Seong Kwon, Santa Clara, CA (US); Cheng Chung Yang, New Taipei (TW); Qiong Wang, Palo Alto, CA (US); Nam Hoon Kim, San Jose, CA (US); Mikhail Popovich, Danville, CA (US); Houle Gan, Santa Clara, CA (US); and Chenhao Nan, Santa Clara, CA (US)
Assigned to Google LLC, Mountain View, CA (US)
Filed by Google LLC, Mountain View, CA (US)
Filed on Oct. 6, 2022, as Appl. No. 17/961,264.
Prior Publication US 2024/0120847 A1, Apr. 11, 2024
Int. Cl. H02M 3/335 (2006.01); H02M 1/00 (2006.01)
CPC H02M 3/33576 (2013.01) [H02M 1/0067 (2021.05); H02M 3/33571 (2021.05)] 18 Claims
OG exemplary drawing
 
1. A voltage regulator comprising:
a plurality of main stages, each main stage comprising first switching circuitry, a primary winding, and a secondary winding inductively coupled to the primary winding, the first switching circuitry configured to selectively couple a main input voltage to the secondary winding at a main stage switching frequency, and the secondary winding coupled between the first switching circuitry and an output terminal, wherein the primary windings of the main stages are connected in series to form a series connection having a first end and a second end; and
at least one accelerated voltage regulator (A V R) bridge comprising second switching circuitry, each AVR bridge coupled to one of the first end or the second end of the series connection, and the second switching circuitry configured to selectively couple an AVR bridge input voltage to the series connection at an AVR bridge switching frequency,
wherein the AVR bridge switching frequency is at least ten times greater than the main stage switching frequency,
wherein the at least one AVR bridge is switched on and off at a duty cycle that is adjustable around 50% while the voltage regulator is in a steady state such that a direct current (DC) component of current generated by the at least one AVR in the primary windings is substantially zero in the steady state, and
wherein the at least one AVR bridge responds to high frequency current transients without regulating a DC output voltage of the voltage regulator, the at least one AVR bridge has a transient frequency response range that overlaps with a transient frequency response range of the main stages, and a lowest transient frequency to which the at least one AVR bridge responds is lower than a highest transient frequency to which the main stages respond.