US 12,469,820 B2
Fine-grained disaggregated server architecture
Carleton L. Molnar, Northborough, MA (US); Adel A. Elsherbini, Tempe, AZ (US); Tanay Karnik, Portland, OR (US); Shawna M. Liff, Scottsdale, AZ (US); Robert J. Munoz, Round Rock, TX (US); Julien Sebot, Portland, OR (US); Johanna M. Swan, Scottsdale, AZ (US); Nevine Nassif, Arlington, MA (US); Gerald S. Pasdast, San Jose, CA (US); Krishna Bharath, Phoenix, AZ (US); Neelam Chandwani, Portland, OR (US); and Dmitri E. Nikonov, Beaverton, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 10, 2021, as Appl. No. 17/548,304.
Prior Publication US 2023/0187407 A1, Jun. 15, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01)
CPC H01L 25/0652 (2013.01) [H01L 23/481 (2013.01); H01L 24/08 (2013.01); H01L 24/20 (2013.01); H01L 2224/08147 (2013.01); H01L 2224/2101 (2013.01); H01L 2924/1427 (2013.01); H01L 2924/37001 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A microelectronic assembly, comprising:
a first plurality of integrated circuit (IC) dies in a first layer, wherein:
the first plurality of IC dies comprises a first IC die, and
the first IC die comprises first conductive contacts at a first face of the first IC die;
a second plurality of IC dies in a second layer between the first layer and a third layer, wherein:
the second plurality of IC dies is in an array of rows and columns, wherein the second plurality of IC dies comprises a second IC die and a third IC die,
the second IC die comprises second conductive contacts at a second face of the second IC die,
the third IC die comprises third conductive contacts at a third face of the third IC die, and
the first conductive contacts are coupled with the second conductive contacts at a first bonding interface between the first face of the first IC die and the second face of the second IC die; and
a third plurality of IC dies in the third layer, wherein:
the third plurality of IC dies is to provide electrical coupling between adjacent ones of the second plurality of IC dies,
the third plurality of IC dies comprises a fourth IC die,
the fourth IC die comprises fourth conductive contacts and fifth conductive contacts at a fourth face of the fourth IC die,
the fourth conductive contacts are coupled with corresponding conductive contacts at a second bonding interface between the fourth face of the fourth IC die and a face of the second IC die opposite the second face, and
the fifth conductive contacts are coupled with the third conductive contacts at a third bonding interface between the fourth face of the fourth IC die and the third face of the third IC die.