US 12,469,817 B2
Support structure to reinforce stacked semiconductor wafers
Kuo-Ming Wu, Zhubei (TW); Hau-Yi Hsiao, Chiayi (TW); Ping-Tzu Chen, Tainan (TW); Chung-Jen Huang, Tainan (TW); and Sheng-Chau Chen, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 16, 2022, as Appl. No. 17/888,569.
Claims priority of provisional application 63/335,362, filed on Apr. 27, 2022.
Prior Publication US 2023/0352438 A1, Nov. 2, 2023
Int. Cl. H01L 21/00 (2006.01); H01L 23/00 (2006.01)
CPC H01L 24/80 (2013.01) [H01L 23/562 (2013.01); H01L 24/08 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80007 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/3512 (2013.01); H01L 2924/35121 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
bonding a first semiconductor wafer to a second semiconductor wafer, wherein a bond interface is disposed between the first and second semiconductor wafers, wherein the first semiconductor wafer has a peripheral region laterally surrounding a central region;
forming a support structure between a first outer edge of the first semiconductor wafer and a second outer edge of the second semiconductor wafer, wherein the support structure is disposed within the peripheral region, wherein the support structure comprises an inner segment between the first semiconductor wafer and the second semiconductor wafer, wherein the support structure is laterally offset from an outermost point of the first outer edge by a lateral distance that is greater than a vertical thickness of the inner segment; and
performing a thinning process on the second semiconductor wafer.