US 12,469,807 B2
Fan-out package structures with cascaded openings in enhancement layer
Ting-Ting Kuo, Hsinchu (TW); Li-Hsien Huang, Hsinchu (TW); Tien-Chung Yang, Hsinchu (TW); Yao-Chun Chuang, Hsinchu (TW); Yinlung Lu, Hsinchu (TW); and Jun He, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 26, 2022, as Appl. No. 17/814,836.
Prior Publication US 2024/0038701 A1, Feb. 1, 2024
Int. Cl. H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/538 (2006.01)
CPC H01L 24/08 (2013.01) [H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/5226 (2013.01); H01L 23/5286 (2013.01); H01L 23/5389 (2013.01); H01L 24/14 (2013.01); H01L 24/19 (2013.01); H01L 24/73 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/12105 (2013.01); H01L 2924/15311 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package structure, comprising:
a die having a frontside and a backside;
a first redistribution layer (RDL) structure disposed on and in contact with the backside of the die;
a second RDL structure disposed on, in contact with, and electrically connected to the frontside of the die;
a through integrated fan-out via (TIV) disposed lateral to the die and extending to electrically connect the first and the second RDL structures;
a molding compound disposed between the first and second RDL structures;
an enhancement layer disposed on the first RDL structure, the enhancement layer comprising a plurality of cascaded openings, wherein each one of the cascaded openings comprises:
a primary opening defined by a first side wall and a bottom wall; and
a secondary opening extended from the bottom wall of the primary opening to the first RDL structure, wherein the secondary opening is smaller in critical dimension than the corresponding primary opening,
a plurality of pre-solder bumps electrically connected to the first RDL structure, each pre-solder bump disposed in one of the cascaded openings, in contact with an uppermost redistribution layer of the first RDL structure, and horizontally aligned with the secondary opening thereof, and
a plurality of solder balls disposed on and electrically connected to the second RDL structure.