US 12,469,801 B2
Moisture seal coating of hybrid bonded stacked die package assembly
Debendra Mallik, Chandler, AZ (US); Mohammad Enamul Kabir, Portland, OR (US); Nitin Deshpande, Chandler, AZ (US); Omkar Karhade, Chandler, AZ (US); Arnab Sarkar, Chandler, AZ (US); Sairam Agraharam, Chandler, AZ (US); Christopher Pelto, Beaverton, OR (US); Gwang-Soo Kim, Portland, OR (US); and Ravindranath Mahajan, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 17, 2021, as Appl. No. 17/554,471.
Prior Publication US 2023/0197637 A1, Jun. 22, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/20 (2006.01); H01L 21/447 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/564 (2013.01) [H01L 25/0655 (2013.01); H01L 21/2007 (2013.01); H01L 21/447 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A microelectronic package structure comprising:
a first die comprising one or more first conductive structures and a first die dielectric material between individual ones of the first conductive structures:
a second die comprising one or more second conductive structures directly on a first set of the one or more first conductive structures;
a third die adjacent to the second die, the third die comprising one or more third conductive structures directly on a second set of the one or more first conductive structures;
a first layer, wherein a first portion of the first layer is on a sidewall of the third die, and wherein a second portion of the first layer, adjacent the first portion of the first layer, is directly on the second set of the one or more first conductive structures, wherein about a 90 degree angle is between the first portion and the second portion, and wherein a third portion of the first layer adjacent to the second portion comprises a step structure, wherein a portion of the step structure is directly on an active region of the first die, wherein the active region comprises circuitry structures, and wherein the step structure comprises a first portion on a sidewall of the first die dielectric material and a second portion directly on the active region, wherein about a 90 degree angle is between the first portion and the second portion; and
a second layer over the first layer, wherein the second layer comprises a surface that is substantially coplanar with top surfaces of the second die and the third die.