| CPC H01L 23/3677 (2013.01) [H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0652 (2013.01); H01L 25/105 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48147 (2013.01); H01L 2224/48149 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1094 (2013.01); H01L 2924/1616 (2013.01); H01L 2924/16251 (2013.01); H01L 2924/1632 (2013.01); H01L 2924/182 (2013.01); H01L 2924/3025 (2013.01)] | 20 Claims |

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1. A semiconductor package, comprising:
a substrate; and
at least one semiconductor chip on the substrate,
wherein the substrate includes,
a body layer having a top surface and a bottom surface,
a first thermal conductive plate on the top surface of the body layer, the first thermal conductive plate connected to a ground terminal of the semiconductor chip, and
a thermal conductive via penetrating the body layer and being in contact with the first thermal conductive plate.
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