US 12,469,700 B2
Ion implantation for reduced hydrogen incorporation in amorphous silicon
Rui Cheng, San Jose, CA (US); Rajesh Prasad, Lexington, MA (US); Karthik Janakiraman, San Jose, CA (US); Gautam K. Hemani, San Jose, CA (US); Krishna Nittala, San Jose, CA (US); Shan Tang, Middleton, MA (US); and Qi Gao, Wilmington, MA (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Appl. No. 18/016,926
Filed by Applied Materials, Inc., Santa Clara, CA (US)
PCT Filed Jul. 21, 2021, PCT No. PCT/US2021/042610
§ 371(c)(1), (2) Date Jan. 19, 2023,
PCT Pub. No. WO2022/020496, PCT Pub. Date Jan. 27, 2022.
Claims priority of provisional application 63/054,320, filed on Jul. 21, 2020.
Prior Publication US 2023/0298892 A1, Sep. 21, 2023
Int. Cl. H01L 21/02 (2006.01); H01L 21/30 (2006.01); H01L 21/3215 (2006.01); H10D 30/01 (2025.01)
CPC H01L 21/02532 (2013.01) [H01L 21/02592 (2013.01); H01L 21/3003 (2013.01); H01L 21/32155 (2013.01); H10D 30/0321 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor processing method comprising:
forming a layer of amorphous silicon on a semiconductor substrate, wherein the layer of amorphous silicon is characterized by a first amount of hydrogen incorporation; and
performing an ion implantation process on the layer of amorphous silicon to remove hydrogen from the layer of amorphous silicon to a second amount of hydrogen incorporation less than the first amount of hydrogen incorporation, wherein the ion implantation process is performed at a temperature of greater than or about 200° C.