| CPC G11C 7/1063 (2013.01) [G11C 7/1057 (2013.01); G11C 7/1069 (2013.01)] | 28 Claims |

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1. A duplex input and output (input/output) circuit of a memory die, the duplex input/output circuit comprising:
an output circuit configured to receive output data from a data line coupled to a buffer region and output the output data to an output bus, in response to a selecting signal, a read enable signal, and an output signal; and
an input circuit configured to receive input data from an input bus, which is separate from the output bus, and output the input data to the data line, in response to the selecting signal, the read enable signal, a write enable signal, and an input signal.
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