| CPC G09G 3/3266 (2013.01) [G09G 3/32 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/08 (2013.01); G09G 2330/08 (2013.01)] | 14 Claims |
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1. A display device, comprising:
a display panel in which a plurality of sub pixels connected to a plurality of scan lines is defined;
a gate driver which supplies a scan signal to the plurality of scan lines;
a timing controller which outputs a plurality of start signals to the gate driver; and
a start control circuit connected between the timing controller and the gate driver to transmit one of the plurality of start signals to the gate driver,
wherein the gate driver includes:
a first gate driver which generates a first scan signal based on a first start signal among the plurality of start signals;
a second gate driver which generates a second scan signal based on a second start signal among the plurality of start signals;
a third gate driver which generates a third scan signal based on a third start signal among the plurality of start signals; and
a fourth gate driver which generates a fourth scan signal based on a fourth start signal among the plurality of start signals,
wherein the start control circuit is connected between the third gate driver and the timing controller and between the fourth gate driver and the timing controller, and
wherein when at least two start signals, among the plurality of start signals output from the timing controller, are a gate turn-on voltage of a pixel transistor to which the scan signal is supplied, the start control circuit stops outputting the plurality of start signals.
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