US 12,469,450 B2
Display driving circuit, display driving method and display panel
Yang Pu, Shenzhen (CN); and Junfeng Xie, Shenzhen (CN)
Assigned to HKC CORPORATION LIMITED, Shenzhen (CN)
Filed by HKC CORPORATION LIMITED, Shenzhen (CN)
Filed on May 16, 2024, as Appl. No. 18/666,351.
Claims priority of application No. 202310645357.4 (CN), filed on May 31, 2023.
Prior Publication US 2024/0404468 A1, Dec. 5, 2024
Int. Cl. G09G 3/3233 (2016.01)
CPC G09G 3/3233 (2013.01) [G09G 2300/0852 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A display driving circuit comprising a first transistor, the first transistor being connected to a display light-emitting subcircuit, wherein the display driving circuit further comprises:
a storage subcircuit connected to a control terminal of the first transistor through a first node and connected to a first terminal of the first transistor through a second node;
a compensation subcircuit connected to a first light-emitting control line, a second terminal of the first transistor and a power supply terminal;
a data writing subcircuit, comprising a third transistor, wherein a control terminal of the third transistor is connected to a scan line, a first terminal of the third transistor is connected to the first node, and a second terminal of the third transistor is connected to a data line, for writing a data line signal into the storage subcircuit in response to a first scan line signal, wherein a potential of the power supply terminal is less than a potential of the scan line when the scan line receives the first scan signal, and the potential of the power supply terminal is higher than the potential of the scan line when the scan line receives a second scan line signal, wherein the first scan line signal is higher than the second scan line signal in potential;
a light-emitting control subcircuit connected to a second light-emitting control line and the second node, the light-emitting control subcircuit further connected to an anode of the display light-emitting subcircuit through a third node, a cathode of the display light-emitting subcircuit being connected to the scan line, and an end of the third node is connected to the display light-emitting subcircuit, another end of the third node is connected to the light-emitting control subcircuit; and
a reverse bias subcircuit, comprising a fourth transistor, wherein a control terminal of the fourth transistor is connected to the scan line connected to the cathode of the display light-emitting subcircuit, a first terminal of the fourth transistor is connected to the third node, and a second terminal of the fourth transistor is connected to the power supply terminal, the reverse bias subcircuit being configured for being conducted to enabling a potential of anode of the display light-emitting subcircuit to be equal to the potential of the power supply terminal in response to the first scan line signal, to make a potential of the cathode of the display light-emitting subcircuit greater than the potential of anode of the display light-emitting subcircuit.