US 12,469,414 B2
Display device and tiled display device including the same
Nak Cho Choi, Yongin-si (KR); Sang Woo An, Yongin-si (KR); Yong Duck Son, Yongin-si (KR); Won Ho Jang, Yongin-si (KR); and Myung Koo Hur, Yongin-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by Samsung Display Co., LTD., Yongin-si (KR)
Filed on Aug. 18, 2022, as Appl. No. 17/890,937.
Claims priority of application No. 10-2022-0012665 (KR), filed on Jan. 27, 2022.
Prior Publication US 2023/0237937 A1, Jul. 27, 2023
Int. Cl. G09F 9/302 (2006.01); H01L 25/075 (2006.01); H10H 20/831 (2025.01); H10H 20/84 (2025.01); H10H 20/857 (2025.01)
CPC G09F 9/3026 (2013.01) [H01L 25/0753 (2013.01); H10H 20/8312 (2025.01); H10H 20/84 (2025.01); H10H 20/857 (2025.01)] 22 Claims
OG exemplary drawing
 
1. A display device comprising:
a substrate comprising a display area, and a non-display area around the display area;
a transistor layer on a first surface of the substrate, the transistor layer comprising a transistor of a pixel circuit located at the display area;
a pad portion at the non-display area, and electrically connected to the pixel circuit;
a first via layer on the transistor layer, and spaced from the pad portion;
a second via layer on the first via layer, and having a step difference with the first via layer to expose a portion of an upper surface of the first via layer;
a third via layer on the second via layer, and having a step difference with the second via layer to expose a portion of an upper surface of the second via layer;
a display element layer on the third via layer at the display area, the display element layer comprising a light emitting element electrically connected to the transistor;
a lead line on a second surface of the substrate;
a side surface connection line on the first surface of the substrate, the second surface of the substrate, and a side surface of the substrate between the first surface and the second surface, the side surface connection line electrically connecting the pad portion and the lead line to each other; and
an over-coating layer covering an entirety of the side surface connection line, and overlapping with the upper surface of the first via layer exposed from the second via layer.