US 12,469,199 B2
Programmable GPU command buffers using mutable command lists
Jaroslaw Chodor, Bydgoszcz (PL); and Zbigniew Zdanowicz, Gdansk PM (PL)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Nov. 3, 2021, as Appl. No. 17/518,229.
Prior Publication US 2023/0138635 A1, May 4, 2023
Int. Cl. G06F 9/455 (2018.01); G06F 8/41 (2018.01); G06F 9/30 (2018.01); G06F 9/32 (2018.01); G06F 9/48 (2006.01); G06F 9/54 (2006.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); G06T 15/00 (2011.01)
CPC G06T 15/005 (2013.01) [G06F 8/41 (2013.01); G06F 9/3005 (2013.01); G06F 9/323 (2023.08); G06F 9/45516 (2013.01); G06F 9/4843 (2013.01); G06F 9/545 (2013.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A computing system, comprising:
a first processor; and
a memory coupled to the first processor to store instructions which, when executed by the first processor, cause the first processor to:
compile a source file to generate a command list, wherein the command list comprises a set of hardware-specific executable commands for a second processor comprising a graphics processing unit (GPU); and
dispatch the command list to a command buffer for execution by the GPU, the command list compiled by the first processor to be reconfigurable at runtime by the GPU, wherein reconfiguration of the command list comprises change a flow order of the command list.