| CPC G06T 7/001 (2013.01) [G06N 3/04 (2013.01); G06N 3/082 (2013.01); H01J 37/222 (2013.01); H01J 37/28 (2013.01); H01L 21/67288 (2013.01); G06T 2207/10061 (2013.01); G06T 2207/20081 (2013.01); G06T 2207/30148 (2013.01); H01J 2237/24578 (2013.01)] | 20 Claims |

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1. A computerized system of examining a semiconductor specimen, the computerized system comprising a processor and memory circuitry (PMC) configured to:
obtain an electron beam (e-beam) image representative of a given layer of a given structure on the semiconductor specimen, the e-beam image acquired in runtime during in-line examination of the semiconductor specimen along a fabrication process thereof; and
process at least the e-beam image using a machine learning (ML) model, and obtain, as an output of the ML model, yield related prediction with respect to the given structure prior to performing an electrical test thereon, wherein the ML model is previously trained during a training phase using a training set pertaining to at least the given layer, the training set comprising:
a plurality of stacks of e-beam images corresponding to a plurality of sites of the given structure on one or more training specimens, each stack of e-beam images representative of the at least the given layer of a respective site; and
test data acquired from an electrical test performed at the plurality of sites and related to actual yield of the training specimens, the test data respectively correlated with the plurality of stacks of e-beam images and used as ground truth thereof.
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