US 12,468,597 B2
Valid signal for latency sensitive die-to-die (D2D) interconnects
Narasimha Lanka, Dublin, CA (US); Debendra Das Sharma, Saratoga, CA (US); Lakshmipriya Seshan, Sunnyvale, CA (US); Swadesh Choudhary, Mountain View, CA (US); Zuoguo Wu, San Jose, CA (US); and Gerald Pasdast, San Jose, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Apr. 29, 2022, as Appl. No. 17/733,627.
Claims priority of provisional application 63/295,183, filed on Dec. 30, 2021.
Claims priority of application No. 202241004437 (IN), filed on Jan. 27, 2022.
Prior Publication US 2022/0261308 A1, Aug. 18, 2022
Int. Cl. G06F 11/10 (2006.01); G06F 11/07 (2006.01); G06F 13/40 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 23/66 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01)
CPC G06F 11/1004 (2013.01) [G06F 11/0772 (2013.01); G06F 13/4068 (2013.01); H01L 23/49816 (2013.01); H01L 23/49833 (2013.01); H01L 23/5381 (2013.01); H01L 23/5383 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 23/66 (2013.01); H01L 24/16 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/1431 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A die for use in a multi-die package, wherein the die comprises:
physical layer (PHY) electrical circuitry to transmit data over a die-to-die (D2D) interconnect link, wherein the interconnect link includes a sideband and a mainband, and wherein the mainband includes a differential clock lane, a valid lane, and a cluster of data lanes; and
PHY logic coupled to the PHY electrical circuitry, the PHY logic to:
transmit, via the PHY electrical circuitry, an 8 unit interval (8-UI) data signal on a data lane of the cluster of data lanes; and
transmit, via the PHY electrical circuitry concurrently with transmission of the data signal, a valid signal on the valid lane, wherein the valid signal is to frame a location of the 8-UI data signal, and wherein the valid signal is further to indicate data related to the die based on at least one change in logical state of the valid signal during the 8-UI data signal.