| CPC G06F 9/3836 (2013.01) [G06F 9/38 (2013.01)] | 16 Claims |

|
1. A method for generating an intermediate representation for a program for execution on an accelerator, the method being executed by one or more processors and comprising:
hooking information on instruction from a program;
determining whether the hooked information on instruction is associated with an accelerator;
if it is determined that the information on instruction is not associated with the accelerator, returning the hooked information on instruction to the program;
if it is determined that the information on instruction is associated with the accelerator, generating a first intermediate representation for the instruction using information on input and output data and information on instruction included in the instruction; and
generating a second intermediate representation for the program for one or more accelerators using the first intermediate representation,
wherein the first intermediate representation and the second intermediate representation include a plurality of data nodes, one or more operation nodes, and a plurality of edges indicating an input and output relationship between the plurality of data nodes and the one or more operation nodes.
|