US 12,467,971 B2
Scan testing using scan frames with embedded commands
Lee D. Whetsel, Parker, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Aug. 15, 2023, as Appl. No. 18/234,003.
Application 18/234,003 is a division of application No. 17/470,500, filed on Sep. 9, 2021, granted, now 11,740,286.
Application 17/470,500 is a division of application No. 16/780,088, filed on Feb. 3, 2020, granted, now 11,137,447, issued on Oct. 5, 2021.
Application 16/780,088 is a division of application No. 16/108,761, filed on Aug. 22, 2018, granted, now 10,591,542, issued on Mar. 17, 2020.
Application 16/108,761 is a division of application No. 15/622,840, filed on Jun. 14, 2017, granted, now 10,088,527, issued on Oct. 2, 2018.
Application 15/622,840 is a division of application No. 15/233,280, filed on Aug. 10, 2016, granted, now 9,714,980, issued on Jul. 25, 2017.
Application 15/233,280 is a division of application No. 14/744,767, filed on Jun. 19, 2015, granted, now 9,435,860, issued on Sep. 6, 2016.
Application 14/744,767 is a division of application No. 14/081,481, filed on Nov. 15, 2013, granted, now 9,091,728, issued on Jul. 28, 2015.
Application 14/081,481 is a division of application No. 13/870,319, filed on Apr. 25, 2013, granted, now 8,618,542, issued on Dec. 31, 2013.
Application 13/870,319 is a division of application No. 13/595,297, filed on Aug. 27, 2012, granted, now 8,445,908, issued on May 21, 2013.
Application 13/595,297 is a division of application No. 13/217,851, filed on Aug. 25, 2011, granted, now 8,283,665, issued on Oct. 9, 2012.
Application 13/217,851 is a division of application No. 12/539,310, filed on Aug. 11, 2009, granted, now 8,028,212, issued on Sep. 27, 2011.
Application 12/539,310 is a division of application No. 11/670,241, filed on Feb. 1, 2007, granted, now 7,657,810, issued on Feb. 2, 2010.
Claims priority of provisional application 60/765,300, filed on Feb. 3, 2006.
Prior Publication US 2023/0384376 A1, Nov. 30, 2023
Int. Cl. G01R 31/3177 (2006.01); G01R 31/317 (2006.01); G01R 31/3185 (2006.01)
CPC G01R 31/3177 (2013.01) [G01R 31/3172 (2013.01); G01R 31/31723 (2013.01); G01R 31/31725 (2013.01); G01R 31/31727 (2013.01); G01R 31/318536 (2013.01); G01R 31/318572 (2013.01); G01R 31/318577 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A test architecture within an integrated circuit, the test architecture comprising:
serial input;
serial-to-parallel circuitry coupled to the serial input and including parallel outputs;
circuitry to be tested, wherein the circuitry to be tested is coupled to the parallel outputs of the serial-to-parallel circuitry;
parallel-to-serial circuitry coupled to the circuitry to be tested;
serial output coupled to the parallel-to-serial circuitry;
a clock input; and
a controller coupled to the serial input, the circuitry to be tested, and the clock input, wherein the controller is configurable to respond to a control bit embedded in a serial scan frame received via the serial input.