CPC H10N 50/10 (2023.02) [H10B 61/00 (2023.02); H10N 50/80 (2023.02)] | 20 Claims |
1. A method of forming an integrated chip, the method comprising:
forming a magnetic tunnel junction (MTJ) device over a semiconductor substrate, the MTJ device having an MTJ disposed between a first electrode and a second electrode, wherein the MTJ comprises a pinned layer, a free layer, and a tunnel barrier layer; and
forming a metal-insulator-metal (MIM) bipolar selector for the MTJ device by a process that includes forming a first metal layer, a non-magnetic layer, and a second metal layer, wherein the non-magnetic layer is between the first metal layer and the second metal layer, and one of the first metal layer and the second metal layer is a ferromagnetic material layer; and
providing the ferromagnetic material layer with fixed polarization;
wherein the ferromagnetic material layer has a magnetic field that extends through the free layer.
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