US 12,137,563 B2
Semiconductor device and manufacturing method of the semiconductor device
Kang Sik Choi, Seongnam-si Gyeonggi-do (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si Gyeonggi-do (KR)
Filed on Jan. 19, 2023, as Appl. No. 18/099,136.
Application 18/099,136 is a continuation of application No. 17/020,011, filed on Sep. 14, 2020, granted, now 11,621,274.
Application 17/020,011 is a continuation of application No. 16/177,044, filed on Oct. 31, 2018, granted, now 10,811,428, issued on Oct. 20, 2020.
Claims priority of application No. 10-2018-0029360 (KR), filed on Mar. 13, 2018.
Prior Publication US 2023/0157025 A1, May 18, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 43/27 (2023.01); H01L 21/764 (2006.01); H01L 21/768 (2006.01); H01L 29/06 (2006.01); H10B 43/35 (2023.01)
CPC H10B 43/27 (2023.02) [H01L 21/764 (2013.01); H01L 21/76837 (2013.01); H01L 29/0649 (2013.01); H10B 43/35 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming a sacrificial group above a doped semiconductor layer;
forming a stack structure above the sacrificial group;
forming a slit passing through the stack structure and extending into the sacrificial group;
forming a horizontal space by removing the sacrificial group through the slit;
forming a semiconductor pattern on a surface of the horizontal space to define a gap in the horizontal space; and
forming a junction in the semiconductor pattern.