US 12,137,297 B2
Imaging devices and imaging apparatuses, and methods for the same
Sungin Hwang, Pittsford, NY (US); Pooria Mostafalu, Penfield, NY (US); and Frederick Brady, Webster, NY (US)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/779,308
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Dec. 2, 2020, PCT No. PCT/JP2020/044941
§ 371(c)(1), (2) Date May 24, 2022,
PCT Pub. No. WO2021/112150, PCT Pub. Date Jun. 10, 2021.
Application 17/779,308 is a continuation of application No. 16/700,660, filed on Dec. 2, 2019, granted, now 11,095,843, issued on Aug. 17, 2021.
Prior Publication US 2022/0415952 A1, Dec. 29, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04N 25/79 (2023.01); H01L 27/146 (2006.01); H04N 25/47 (2023.01)
CPC H04N 25/79 (2023.01) [H01L 27/14612 (2013.01); H01L 27/14623 (2013.01); H01L 27/14636 (2013.01); H04N 25/47 (2023.01); H01L 27/14634 (2013.01); H01L 27/1464 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An imaging device, comprising:
a first pixel including a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges;
a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal, the first converter including a first transistor coupled to the first photoelectric conversion region and a second transistor coupled to the first transistor; and
a wiring layer on the first substrate and including a first level of wirings arranged in a first arrangement overlapping the first photoelectric conversion region and in a second arrangement overlapping the first and second transistors, wherein, in a plan view, the second arrangement comprises wirings with different shapes than wirings in the first arrangement.