US 12,136,958 B2
Tester channel multiplexing in test equipment
Yangyang Zhang, Wuhan (CN); Feng Ru, Wuhan (CN); Yi Chen, Wuhan (CN); and Mengda Wang, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Dec. 1, 2021, as Appl. No. 17/539,704.
Application 17/539,704 is a continuation of application No. PCT/CN2021/127747, filed on Oct. 30, 2021.
Prior Publication US 2023/0133863 A1, May 4, 2023
Int. Cl. H04B 17/00 (2015.01); G01R 31/319 (2006.01)
CPC H04B 17/0085 (2013.01) [G01R 31/31919 (2013.01); G01R 31/31924 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A waveform driving device for a tester channel, comprising:
a waveform generator configured to generate a waveform signal based on a driving source signal;
a bit map register configured to store a bit map associated with the tester channel; and
an output logic circuit coupled to the bit map register and the waveform generator, and configured to control an output of the waveform signal through the tester channel based on a bit control signal from the bit map;
wherein the output logic circuit comprises:
an OR gate coupled to the bit map register to receive the bit control signal from the bit map register, and configured to generate an OR output based on the bit control signal; and
a multiplexer coupled to the OR gate and the waveform generator to receive the OR output and the waveform signal, respectively, and configured to control the output of the waveform signal through the tester channel based on the OR output.