US 12,136,952 B2
Co-packaged integrated optoelectronic module and co-packaged optoelectronic switch chip
Min-Sheng Kao, Taipei (TW); ChunFu Wu, Dongguan (CN); Chung-Hsin Fu, Taipei (TW); QianBing Yan, Dongguan (CN); LinChun Li, Dongguan (CN); Chih-Wei Yu, Taipei (TW); Chien-Tzu Wu, Taipei (TW); and Yi-Tseng Lin, Taipei (TW)
Assigned to DONGGUAN LUXSHARE TECHNOLOGIES CO., LTD, Dongguan (CN)
Filed by Dongguan Luxshare Technologies Co., Ltd, Dongguan (CN)
Filed on Aug. 10, 2022, as Appl. No. 17/884,845.
Claims priority of application No. 202111218807.9 (CN), filed on Oct. 20, 2021.
Prior Publication US 2023/0122313 A1, Apr. 20, 2023
Int. Cl. H04B 10/40 (2013.01); G02B 6/42 (2006.01)
CPC H04B 10/40 (2013.01) [G02B 6/4246 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A co-packaged integrated optoelectronic module, comprising:
an optoelectronic submodule, comprising:
a digital signal processing chip configured to convert an electrical analog signal, which is received, into an electrical digital signal, and process the electrical digital signal to output a high-speed digital signal;
an optoelectronic signal analog conversion chip connected to the digital signal processing chip and configured to convert an optical analog signal into the electrical analog signal to the digital signal processing chip; and
an optical transceiver chip connected to the optoelectronic signal analog conversion chip and configured to receive and transmit the optical analog signal to the optoelectronic signal analog conversion chip, and transmit another optical analog signal;
a slave microprocessor connected to the optoelectronic submodule and configured to monitor operation of the optoelectronic submodule;
a master microprocessor connected to the optoelectronic submodule and configured to process a low-speed digital signal transmitted from the co-packaged integrated optoelectronic module to the outside, monitor operation of the co-packaged integrated optoelectronic module, and perform initialization of the co-packaged integrated optoelectronic module;
a carrier board, wherein the optoelectronic submodule, the slave microprocessor and the master microprocessor are disposed on and electrically connected to the carrier board; and
a power chip configured to provide power to the optoelectronic submodule, the slave microprocessor and the master microprocessor;
wherein the slave microprocessor is further configured to perform power management on the optoelectronic submodule through the power chip based on digital monitoring data of the optoelectronic submodule.