US 12,136,914 B2
Control circuit for transistor with floating source node
Kevin David Moran, Trenton, MI (US); and Guoming George Zhu, Novi, MI (US)
Assigned to Board of Trustees of Michigan State University, East Lansing, MI (US)
Filed by Board of Trustees of Michigan State University, East Lansing, MI (US)
Filed on Oct. 25, 2022, as Appl. No. 17/972,713.
Claims priority of provisional application 63/272,727, filed on Oct. 28, 2021.
Prior Publication US 2023/0133293 A1, May 4, 2023
Int. Cl. H03K 17/687 (2006.01); H01F 38/12 (2006.01)
CPC H03K 17/687 (2013.01) [H01F 38/12 (2013.01); H03K 2217/0054 (2013.01); H03K 2217/0081 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A control circuit for a field-effect transistor with a floating source node, comprising:
a charge storage device electrically connected between a gate of the field-effect transistor and a DC power supply;
a gate control circuit electrically connected between the charge storage device and the gate of the field-effect transistor and configured to receive a gate control signal, where the gate control signal is a rectangular pulse wave; and
a charge control circuit electrically connected between the DC power supply and the charge storage device and configured to receive the gate control signal;
wherein the gate control circuit operates to turn on the field-effect transistor during the on time of the gate control signal and turn off the field-effect transistor during the off time of the gate control signal;
wherein the charge control circuit operates to charge the charge storage device with power from the DC power supply during off time of the gate control signal;
wherein the gate control circuit operates to electrically couple a source terminal of the field-effect transistor and a negative terminal of the charge storage device to ground during off time of the gate control signal.