US 12,136,892 B2
Power converter for suppressing heat transfer to electrical component
Tomohisa Sano, Kariya (JP); and Yuu Yamahira, Kariya (JP)
Assigned to DENSO CORPORATION, Kariya (JP)
Filed by DENSO CORPORATION, Kariya (JP)
Filed on Oct. 22, 2021, as Appl. No. 17/508,589.
Application 17/508,589 is a continuation of application No. PCT/JP2020/015974, filed on Apr. 9, 2020.
Claims priority of application No. 2019-086404 (JP), filed on Apr. 26, 2019.
Prior Publication US 2022/0045626 A1, Feb. 10, 2022
Int. Cl. H02M 7/537 (2006.01); H02M 7/00 (2006.01); E03D 11/06 (2006.01)
CPC H02M 7/537 (2013.01) [H02M 7/003 (2013.01); E03D 11/06 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A power converter comprising:
at least one semiconductor module that has a power terminal and is electrically connected to a direct-current power source;
a capacitor element electrically connected to the at least one semiconductor module;
a positive busbar arranged to electrically connect between the direct-current power source and the at least one semiconductor module;
a negative busbar arranged to electrically connect between the direct-current power source and the at least one semiconductor module,
the capacitor element and the at least one semiconductor module being physically connected to one another through only the positive busbar and the negative busbar;
a cooling unit configured to cool the at least one semiconductor module,
the at least one semiconductor module and the cooling unit being stacked in a predetermined stack direction to constitute a semiconductor stack, and
the capacitor element being disposed to be separated from the semiconductor stack in a lateral direction perpendicular to the predetermined stack direction, wherein:
each of the positive busbar and the negative busbar extends in the lateral direction perpendicular to the predetermined stack direction away from the semiconductor stack;
only the positive busbar and the negative busbar constitute a direct thermal transfer path between the at least one semiconductor module and the capacitor element;
each of the positive busbar and the negative busbar comprises:
a power-source connection portion electrically connected to the direct-current power source;
an element connection portion electrically connected to the capacitor element;
at least one terminal connection portion electrically connected to the power terminal of the at least one semiconductor module;
a first current path that is located away from the semiconductor stack and has a first thermal resistance and is a current flow path between the power-source connection portion and the at least one terminal connection portion; and
a second current path that is located away from the semiconductor stack and has a second thermal resistance and is a current flow path between the power-source connection portion and the element connection portion; and
the first thermal resistance of the first current path of at least one of the positive busbar and the negative busbar being lower than the second thermal resistance of the second current path of the at least one of the positive busbar and the negative busbar.