CPC H02M 3/33571 (2021.05) [H02M 1/0058 (2021.05); H02M 1/083 (2013.01); H02M 3/33592 (2013.01); H02M 1/0009 (2021.05)] | 13 Claims |
1. A resonant half-bridge flyback power converter comprising:
a first transistor and a second transistor which are configured to form a half-bridge circuit connected between an input voltage and a ground potential;
a transformer, wherein a primary winding of the transformer and a resonant capacitor are connected in series to form a resonant tank, wherein the resonant tank is switched between the input voltage and the ground potential by the half-bridge circuit so as to resonate during both magnetizing and demagnetizing of the transformer for converting the input voltage to an output voltage; and
a switching control circuit configured to operably generate a first driving signal and a second driving signal to control the first transistor and the second transistor respectively;
wherein the first driving signal is configured to magnetize the transformer;
wherein the second driving signal includes at most one pulse between two consecutive pulses of the first driving signal, wherein the at most one pulse of the second driving signal includes either a resonant pulse for operating a resonant cycle for demagnetizing after the transformer is magnetized or a ZVS (zero voltage switching) pulse for achieving ZVS of the first transistor, wherein a primary switching current flowing through both the primary winding and the resonant capacitor and a secondary switching current flowing through a secondary winding of the transformer have an at least partially resonating sine- wave form during the resonant cycle;
wherein the switching control circuit includes a timer configured to operably generate a skipping cycle period when an output power corresponding to the output voltage is lower than a predetermined threshold; wherein a resonant pulse corresponding to the resonant cycle of the second driving signal is skipped during the skipping cycle period; wherein the second transistor is turned on for a ZVS pulse after the skipping cycle period for achieving ZVS of the first transistor; wherein the skipping cycle period is increased in response to the decrease of the output power.
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