US 12,136,668 B2
Heterostructure including alternating sets of channel and barrier layers
Kai Cheng, Suzhou (CN); Peng Xiang, Suzhou (CN); and Yu Zhu, Nantong (CN)
Assigned to ENKRIS SEMICONDUCTOR, INC., Suzhou (CN)
Filed by ENKRIS SEMICONDUCTOR, INC., Suzhou (CN)
Filed on May 10, 2021, as Appl. No. 17/315,665.
Application 17/315,665 is a continuation of application No. PCT/CN2019/130513, filed on Dec. 31, 2019.
Prior Publication US 2021/0265495 A1, Aug. 26, 2021
Int. Cl. H01L 29/778 (2006.01); H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7786 (2013.01) [H01L 21/0217 (2013.01); H01L 21/0254 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a heterojunction, comprising at least two sets of channel layers and barrier layers stacked sequentially;
a first p-type semiconductor, disposed in a gate region of the heterojunction and extended to a bottom of the heterojunction; and
a second p-type semiconductor, disposed on the gate region of the heterojunction.