| CPC H01L 29/7397 (2013.01) [H01L 29/861 (2013.01); H02M 7/53871 (2013.01)] | 26 Claims |
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1. A semiconductor device comprising a transistor and a diode both formed in a common semiconductor base body, comprising:
a first electrode;
a second electrode;
a third electrode for current sensing;
a fourth electrode for current sensing; and
at least one first gate electrode,
wherein the semiconductor base body includes:
a first main surface and a second main surface as one main surface and the other main surface, respectively;
a transistor region in which the transistor is formed;
a diode region in which the diode is formed; and
a separation region formed between the transistor region and the diode region,
wherein the transistor region includes:
a first semiconductor layer of a first conductivity type;
an eighth semiconductor layer of the first conductivity type provided on the second main surface side of the first semiconductor layer and having a first conductivity type impurity concentration higher than that of the first semiconductor layer;
a second semiconductor layer of a second conductivity type provided on the second main surface side of the eighth semiconductor layer;
a third semiconductor layer of the second conductivity type provided on the first main surface side of the first semiconductor layer; and
at least one fourth semiconductor layer selectively provided on the first main surface side of the third semiconductor layer,
wherein the diode region includes:
the first semiconductor layer;
the eighth semiconductor layer provided on the second main surface side of the first semiconductor layer;
a fifth semiconductor layer of the first conductivity type having a first conductivity type impurity concentration higher than that of the first semiconductor layer and provided on the second main surface side of the eighth semiconductor layer; and
a sixth semiconductor layer of the second conductivity type provided on the first main surface side of the first semiconductor layer,
wherein the first electrode is provided on the first main surface in the transistor region and in the diode region,
wherein the second electrode is provided on the second main surface in the transistor region and in the diode region,
wherein the third electrode is provided on the first main surface in the transistor region of the semiconductor base body at a distance from the first electrode,
wherein the fourth electrode is provided on the first main surface in the diode region of the semiconductor base body at a distance from the first electrode,
wherein the third semiconductor layer and the at least one fourth semiconductor layer are electrically connected to the first electrode in the first main surface in the transistor region,
wherein the third semiconductor layer and the at least one fourth semiconductor layer are electrically connected to the third electrode in the first main surface in the transistor region,
wherein the second semiconductor layer is electrically connected to the second electrode in the second main surface in the transistor region,
wherein the at least one first gate electrode faces the first semiconductor layer, the third semiconductor layer, and the at least one fourth semiconductor layer via at least one first insulating film in the transistor region,
wherein the sixth semiconductor layer is electrically connected to the first electrode in the first main surface in the diode region,
wherein the sixth semiconductor layer is connected to the fourth electrode in the first main surface in the diode region, and
wherein the fifth semiconductor layer is connected to the second electrode in the second main surface in the diode region.
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