US 12,136,652 B2
Semiconductor device
Taku Horii, Osaka (JP)
Assigned to SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka (JP)
Appl. No. 17/595,457
Filed by SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka (JP)
PCT Filed May 22, 2020, PCT No. PCT/JP2020/020321
§ 371(c)(1), (2) Date Nov. 17, 2021,
PCT Pub. No. WO2021/005896, PCT Pub. Date Apr. 14, 2021.
Claims priority of application No. 2019-128619 (JP), filed on Jul. 10, 2019.
Prior Publication US 2022/0199778 A1, Jun. 23, 2022
Int. Cl. H01L 29/16 (2006.01); H01L 21/28 (2006.01); H01L 23/00 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/1608 (2013.01) [H01L 21/28017 (2013.01); H01L 24/05 (2013.01); H01L 24/29 (2013.01); H01L 29/42364 (2013.01); H01L 29/49 (2013.01); H01L 29/78 (2013.01); H01L 2224/05099 (2013.01); H01L 2224/29099 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor substrate;
a gate insulator provided on a surface of the semiconductor substrate;
a plurality of convex portions, formed of an insulator, and provided on and in direct contact with the gate insulator;
a bonding film, including silicon or aluminum, provided on the gate insulator; and
a gate pad layer provided above the bonding film,
wherein the gate pad layer includes titanium in at least a region in contact with the bonding film, and
the bonding film is provided between adjacent convex portions of the plurality of convex portions.