US 12,136,649 B2
Deep trench isolation structures with a substrate connection
Jianbo Zhou, Singapore (SG); Shiang Yang Ong, Singapore (SG); Namchil Mun, Singapore (SG); Hung Chang Liao, Singapore (SG); and Zhongxiu Yang, Singapore (SG)
Assigned to GlobalFoundries Singapore Pte. Ltd., Singapore (SG)
Filed by GlobalFoundries Singapore Pte. Ltd., Singapore (SG)
Filed on Apr. 19, 2022, as Appl. No. 17/723,665.
Prior Publication US 2023/0335583 A1, Oct. 19, 2023
Int. Cl. H01L 29/00 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01)
CPC H01L 29/0649 (2013.01) [H01L 21/762 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a semiconductor substrate including a device region; and
a deep trench isolation structure in the semiconductor substrate, the deep trench isolation structure including a first portion, a second portion adjacent to the first portion, and a conductor layer in the first portion and the second portion, the conductor layer in the first portion of the deep trench isolation structure surrounding the device region, and the conductor layer in the second portion of the deep trench isolation structure defining a first electrical connection to the semiconductor substrate,
wherein the first portion of the deep trench isolation structure includes a first trench, the conductor layer is positioned in the first trench, the second portion of the deep trench isolation structure includes a second trench and a third trench, the conductor layer is positioned in the second trench and the third trench, the second trench and the third trench intersect over a shared region at which the conductor layer is electrically connected to the semiconductor substrate at a bottom of the shared region, the first trench has a closed-geometrical shape defined by an octagon having a first side, a second side, and a third side connecting the first side to the second side, and the second portion of the deep trench isolation structure is positioned adjacent to the third side.