US 12,136,631 B2
Display panel and method for manufacturing the same
Yoon-Jong Cho, Yongin-si (KR); Seokje Seong, Seongnam-si (KR); Seongjun Lee, Seoul (KR); Yoonjee Shin, Ulsan (KR); Suyeon Yun, Seoul (KR); Wooho Jeong, Anyang-si (KR); and Joonhoo Choi, Seoul (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Nov. 20, 2023, as Appl. No. 18/514,930.
Application 18/514,930 is a continuation of application No. 17/467,495, filed on Sep. 7, 2021, granted, now 11,824,065.
Application 17/467,495 is a continuation of application No. 16/882,926, filed on May 26, 2020, granted, now 11,127,766, issued on Sep. 21, 2021.
Application 16/882,926 is a continuation of application No. 16/139,512, filed on Sep. 24, 2018, granted, now 10,665,617, issued on May 26, 2020.
Claims priority of application No. 10-2017-0162011 (KR), filed on Nov. 29, 2017.
Prior Publication US 2024/0088167 A1, Mar. 14, 2024
Int. Cl. H01L 27/12 (2006.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); H10K 50/11 (2023.01); H10K 50/844 (2023.01); H10K 59/126 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 77/10 (2023.01); H10K 102/00 (2023.01)
CPC H01L 27/124 (2013.01) [G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); H01L 27/1225 (2013.01); H10K 50/11 (2023.02); H10K 50/844 (2023.02); H10K 59/126 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 77/111 (2023.02); H10K 2102/311 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a base layer comprising a first area and a second area bent from the first area;
at least one inorganic layer overlapping the first area and the second area and disposed on the base layer, and having a lower opening defined in the second area;
a first thin-film transistor disposed on the at least one inorganic layer, and wherein the first thin-film transistor comprises a silicon semiconductor pattern overlapping the first area and including a first input area, a first output area, and a first channel area between the first input area and the first output area;
a second thin-film transistor disposed on the at least one inorganic layer, and wherein the second thin-film transistor comprises an oxide semiconductor pattern overlapping the first area and including a second input area, a second output area, and a second channel area between the second input area and the second output area, and a second gate electrode under the oxide semiconductor pattern;
a plurality of intermediate insulation layers disposed on the at least one inorganic layer and having a first contact hole exposing the first output area;
a first electrode disposed on the plurality of intermediate insulating layers and connected to the first output area through the first contact hole;
an upper insulating layer disposed on the plurality of intermediate insulating layers;
an organic layer disposed on the upper insulating layer and overlapping the first area and the second area;
a second electrode disposed on the organic layer and connected to the first electrode through a second contact hole defined in the upper insulating layer and the organic layer, and
a light emitting element disposed on the organic layer, overlapping the first area, and electrically connected to the second electrode, and
wherein an upper opening is defined in the plurality of intermediate insulation layers and the upper insulating layer, extending from the lower opening, and exposing a portion of the upper surface of the at least one inorganic layer,
the organic layer is disposed in the lower opening and the upper opening, and
the depth of the first contact is substantially the same as a depth of the upper opening corresponding to the intermediate insulting layers.