US 12,136,626 B2
Integrated circuit including multiple height cell
Jung-ho Do, Hwaseong-si (KR); Ji-su Yu, Seoul (KR); Hyeon-gyu You, Jeollabuk-do (KR); Seung-young Lee, Seoul (KR); and Jae-boong Lee, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Aug. 19, 2021, as Appl. No. 17/406,157.
Application 17/406,157 is a continuation of application No. 16/292,433, filed on Mar. 5, 2019, granted, now 11,121,155.
Claims priority of application No. 10-2018-0057324 (KR), filed on May 18, 2018.
Prior Publication US 2021/0384222 A1, Dec. 9, 2021
Int. Cl. H01L 27/118 (2006.01); G06F 30/39 (2020.01); H01L 27/02 (2006.01)
CPC H01L 27/11807 (2013.01) [G06F 30/39 (2020.01); H01L 27/0207 (2013.01); H01L 2027/11866 (2013.01); H01L 2027/11875 (2013.01); H01L 2027/11881 (2013.01); H01L 2027/11887 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a first cell in a first row extending in a first direction;
a second cell in a second row extending in the first direction adjacent to the first row; and
a third cell continuously extending in the first row and the second row,
wherein the first cell comprises a plurality of first fins extending in the first direction and each configured to form a transistor of a first type or a transistor of a second type,
wherein the second cell comprises a plurality of second fins extending in the first direction and each configured to form a transistor of the first type or a transistor of the second type,
wherein the third cell comprises a plurality of third fins extending in the first direction in the first row and a plurality of fourth fins extending in the first direction in the second row,
wherein the plurality of third fins are configured to form a transistor of the first type, and
wherein the plurality of fourth fins are configured to form a transistor of the second type.