US 12,136,625 B2
Low cost, high performance analog metal oxide semiconductor transistor
Pushpa Mahalingam, Richardson, TX (US); and Alexei Sadovnikov, Sunnyvale, CA (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Oct. 28, 2021, as Appl. No. 17/512,908.
Prior Publication US 2023/0134131 A1, May 4, 2023
Int. Cl. H01L 27/092 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/8238 (2006.01)
CPC H01L 27/0928 (2013.01) [H01L 21/823814 (2013.01); H01L 21/823857 (2013.01); H01L 21/823892 (2013.01); H01L 21/2652 (2013.01); H01L 21/266 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A microelectronic device, comprising:
a substrate containing a semiconductor material;
a field relief dielectric layer on a top surface of the semiconductor material; and
a metal oxide semiconductor (MOS) transistor, including:
a body well in the semiconductor material, the body well having a first conductivity type;
a drain well in the semiconductor material, laterally contacting the body well, the drain well having a second conductivity type opposite the first conductivity type;
a source well in the semiconductor material, laterally contacting the body well opposite from the drain well, the source well having the second conductivity type, wherein the source well has a first portion overlapping a footprint of the body well and a second portion nonoverlapping the footprint; and
a gate electrode on a gate dielectric layer disposed on the top surface, wherein the drain well extends partway under the gate electrode at the top surface, and the source well extends partway under the gate electrode at the top surface.