US 12,136,615 B2
Electronic package with interposer between integrated circuit dies
Matthew Essar, Wylie, TX (US); Curtis Miller, Wylie, TX (US); Christopher Sanabria, Richardson, TX (US); and Zhunming Du, Plano, TX (US)
Assigned to Qorvo US, Inc., Greensboro, NC (US)
Filed by Qorvo US, Inc., Greensboro, NC (US)
Filed on Nov. 30, 2021, as Appl. No. 17/538,517.
Prior Publication US 2023/0170340 A1, Jun. 1, 2023
Int. Cl. H01L 25/16 (2023.01); H01L 23/00 (2006.01); H01L 23/043 (2006.01); H01L 23/492 (2006.01); H01L 23/498 (2006.01); H01L 23/64 (2006.01); H01L 23/66 (2006.01)
CPC H01L 25/165 (2013.01) [H01L 23/043 (2013.01); H01L 23/492 (2013.01); H01L 23/49822 (2013.01); H01L 23/642 (2013.01); H01L 23/66 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/83 (2013.01); H01L 2223/6683 (2013.01); H01L 2224/29111 (2013.01); H01L 2224/29144 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48195 (2013.01); H01L 2224/83801 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic package, comprising:
a metal base;
a solder coupled to the metal base;
a first integrated circuit die coupled to the metal base by the solder, the first integrated circuit die having a first edge at a periphery of the first integrated circuit die that is normal to the metal base;
a second integrated circuit die coupled to the metal base by the solder, the second integrated circuit die having a second edge at a periphery of the second integrated circuit die that is normal to the metal base;
an interposer coupled to the metal base by the solder, wherein the interposer defines a third edge at a periphery of the interposer that is normal to the metal base and a fourth edge at the periphery of the interposer that is normal to the metal base and opposite the third edge, the interposer having the third edge and the fourth edge positioned between the first edge of the first integrated circuit die and the second edge of the second integrated circuit die the first integrated circuit die coupled to the metal base by the solder, the first integrated circuit die having the first edge at the periphery of the first integrated circuit die that is normal to the metal base;
at least one inner capacitor mounted to the interposer;
an input passive circuit substrate mechanically coupled to the metal base;
an output passive circuit substrate mechanically coupled to the metal base; and
wherein at least a portion of the first integrated circuit die, the second integrated circuit die, and the interposer are positioned between the input passive circuit substrate and the output passive circuit substrate.