CPC H01L 23/642 (2013.01) [H01L 23/5383 (2013.01); H01L 25/0652 (2013.01); H01L 28/40 (2013.01); H10B 80/00 (2023.02)] | 20 Claims |
1. A method of manufacturing a capacitor embeddable in a substrate core of a semiconductor device, the method comprising:
providing a conductive substrate having a front side and a back side;
providing a conductive polymer layer on a dielectric layer formed on the front side of the conductive substrate, wherein the dielectric layer is conformal with a high surface area (HSA) portion of the conductive substrate on the front side of the conductive substrate;
providing a carbonaceous layer on the conductive polymer layer;
providing a front metallization layer on the carbonaceous layer, the front metallization layer being electrically connected to the conductive polymer layer;
providing a back metallization layer on the back side of the conductive substrate, the back metallization layer being electrically connected to the conductive substrate;
removing the HSA portion of the conductive substrate in one or more regions of the front side of the conductive substrate to produce a plurality of isolated islands of the HSA portion having the dielectric layer conformal therewith; and
providing a plurality of electrically isolated stacks respectively on the plurality of isolated islands, each of the stacks including a portion of the conductive polymer layer, a portion of the carbonaceous layer, and a portion of the front metallization layer.
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