US 12,136,519 B1
Low inductance capacitor with annular distributed cores
Hui Guo, Shanghai (CN); Yi Wang, Shanghai (CN); Yansong Wang, Shanghai (CN); Tao Yuan, Shanghai (CN); Ningning Liu, Shanghai (CN); Pei Sun, Shanghai (CN); Xinhua Guo, Shanghai (CN); Chi Xu, Shanghai (CN); Shuang Huang, Shanghai (CN); Xipei Ma, Shanghai (CN); Chao Yang, Shanghai (CN); Minghui Ma, Shanghai (CN); and Lifeng Ma, Shanghai (CN)
Assigned to SHANGHAI UNIVERSITY OF ENGINEERING SCIENCE, Shanghai (CN)
Filed by Shanghai University of Engineering Science, Shanghai (CN)
Filed on Jun. 28, 2024, as Appl. No. 18/759,071.
Claims priority of application No. 202311002047.7 (CN), filed on Aug. 10, 2023.
Int. Cl. H01G 4/228 (2006.01); H01G 2/08 (2006.01); H01G 4/224 (2006.01); H01G 4/38 (2006.01)
CPC H01G 4/228 (2013.01) [H01G 2/08 (2013.01); H01G 4/224 (2013.01); H01G 4/38 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A low inductance capacitor with annular distributed cores, comprising:
a lower bus bar, wherein the lower bus bar is arranged in a cylindrical structure with an open end, and a peripheral surface of the lower bus bar is provided with a plurality of openings at equal intervals in a circumferential direction, and an outer peripheral surface of the lower bus bar is divided into a plurality of copper bar connecting plates, and an outer wall of the open end of the lower bus bar is provided with lower connection terminals;
wherein a plurality of capacitor cores are arranged at equal intervals in the circumferential direction inside the lower bus bar, and the plurality of capacitor cores are arranged in one-to-one correspondence with the plurality of copper bar connecting plates, and one end of each of the plurality of capacitor cores abuts against a closed end of the lower bus bar; and
an upper bus bar, wherein a side surface of the upper bus bar abuts against an other end of each of the plurality of capacitor cores, and a peripheral surface of the upper bus bar is provided with upper connection terminals;
wherein currents accessed from the lower connection terminals flow to the closed end of the lower bus bar along the copper bar connecting plates, and flow to the upper bus bar through the capacitor cores, and then flow out from the upper connection terminals to form a loop; wherein positions of the plurality of copper bar connecting plates are in one-to-one correspondence with positions of the plurality of capacitor cores, and flow directions of the currents are opposite;
wherein one side surface of the upper bus bar is provided with a stepped circular frustum, and the stepped circular frustum abuts against the other end of each of the plurality of capacitor cores, and a gap is left between the upper connection terminals and the lower connection terminals through the stepped circular frustum;
wherein the lower bus bar, the upper bus bar and the plurality of capacitor cores are fixed in a shell through a filler, and an inner wall of the shell is separated from an outer wall of the lower bus bar through the filler; and
wherein one end of the shell is set as an open end, and a notch is formed on an outer wall of the open end of the shell, and the upper connection terminals and the lower connection terminals protrude from the notch.